1. Field of the Invention
The present invention relates to a display unit for displaying characters and graphics on its screen.
2. Description of Related Art
There are roughly two methods of displaying characters and graphics on a screen: One is a character based on-screen display (abbreviated as character OSD from now on); and the other is a bitmapped on-screen display (abbreviated as bitmapped OSD from now on). Although the character OSD has a feature of achieving the character display with rather small hardware, it cannot implement moving display in which characters and graphics move from time to time, thus imposing limitations on display capability. In contrast, the bitmapped OSD has enhanced display capability, making it possible to implement the moving display such as graphics display, although it requires a large capacity display memory, and increases the scale of hardware.
FIG. 11 is a block diagram showing the configuration of a conventional character OSD unit, in which the reference numeral 1 designates a CPU for carrying out overall control of the unit; 2 designates a font ROM for storing font data; 3 designates an OSD RAM for storing character codes and the like; 4 designates a control signal generator for generating control signals required for operating respective blocks; 5 designates a main memory for storing programs for operating the CPU 1; 6 designates a latch circuit for latching the output signal of the font ROM 2 in accordance with one of the control signals generated by the control signal generator 4; 7 designates a shift register for delivering the output of the latch circuit 6 in accordance with one of the control signals generated by the control signal generator 4; and 8 designates an OSD RGB circuit for coloring data output from the shift register 7.
FIG. 12 is a block diagram illustrating details of the control signal generator 4 in FIG. 11. In FIG. 12, the reference numerals 9-24 each designate a control register for controlling each block; 25 designates a horizontal synchronizing signal pulse counter for counting pulses of a horizontal synchronizing signal H-SYNC after being reset by a vertical synchronizing signal V-SYNC; 26 designates a comparator for comparing the output value of the horizontal synchronizing signal pulse counter 25 with the outputs of the control registers 9-24 of the blocks; 27 designates a latch circuit for latching the display block number output from the comparator 26; 28 designates a frequency divider for dividing the horizontal synchronizing signal H-SYNC; 29 designates a vertical line counter for counting the divided horizontal synchronizing signal H-SYNC; and 30 designates a horizontal control signal generator for generating from a display clock signal a horizontal display character number, an OSD RAM access signal, a font ROM access signal, a shift register latch signal, a latch signal, and the like.
Next, the operation will be described.
First, setting of registers and others will be explained. In accordance with a program stored in the main memory 5, the CPU 1 first sets the control registers 9-24 of the blocks in the control signal generator 4. The control registers 9-24 store data such as vertical display start positions of respective blocks 1-16. Subsequently, the CPU 1 stores each character code of characters to be displayed at an address in the OSD RAM 3 corresponding to a desired display position (in terms of an n-th character position of an m-th block). Afterward, it starts display by setting a particular bit in the control signal generator 4 for controlling the start of the display.
Next, decision of the display start position in the vertical direction will be described. Having been reset by the vertical synchronizing signal V-SYNC, the horizontal synchronizing signal pulse counter 25 counts the pulses of the horizontal synchronizing signal H-SYNC. The comparator 26 sequentially compares the count value of the horizontal synchronizing signal pulse counter 25 with each value of the vertical display start positions stored in the control registers 9-24 every time the horizontal synchronizing signal H-SYNC is supplied, and outputs a vertical position matched signal when they agree with each other. Thus, the display block number is latched in the latch circuit 27, and the latched display block number is supplied to the OSD RAM 3.
Once the vertical display start position has been determined, the vertical position matched signal, activates the horizontal control signal, generator 30 which generates in accordance with the display clock signal the horizontal display character number, OSD RAM access signal, font ROM access signal, shift register latch signal, display clock 1, and latch signal.
The display block number stored in the latch circuit 27 and the horizontal display character number output from the horizontal control signal generator 30 are supplied to the OSD RAM 3 as its address. Thus, the OSD RAM 3 reads the character code to be displayed in response to the OSD RAM access signal. The character code is input to the font ROM 2 and serves as the address of the font ROM 2 along with the count value of the vertical line counter 29. The font ROM 2 outputs the font data in response to the font ROM access signal, and the latch circuit 6 holds the font data.
Having been reset by the vertical position matched signal, the vertical line counter 29 counts the signal generated by dividing the horizontal synchronizing signal H-SYNC by the frequency divider 28. Its dividing ratio varies depending on the vertical dimension of a display character. The shift register 7 stores the font data held in the latch circuit 6 in response to the shift register latch signal. The shift register 7 shifts the font data in serial fashion in response to the display clock signal 1 generated by dividing the original display clock signal in accordance with the horizontal character dimension. The font data output from the shift register 7 is colored by the OSD RGB circuit 8 whose color information necessary for the coloring is stored in the OSD RAM 3. Details of the color information will be omitted here because it has no direct bearing on the present invention.
FIG. 13 is a timing chart showing the operation of the conventional character OSD. As illustrated in FIG. 13, the font data fed from the font ROM 2 is latched in response to the signal indicating the horizontal display character number, and is output from the shift register 7.
FIG. 14 is a block diagram showing a bitmapped OSD unit for carrying out the OSD by writing data into a frame memory in the bitmapped fashion. In FIG. 14, the reference numeral 51 designates a CPU for controlling the overall operation of the unit; 52 designates a font ROM for storing font data; 53 designates a frame memory having a memory capacity matching the pixel numbers on a desired display screen; 54 designates a main memory for storing programs and data for operating the CPU 51; 55 designates a first in first out memory (abbreviated as FIFO from now on) for storing data output from the frame memory 53; 56 designates a color palette for converting display data to color data; and 57 designates a D/A converter for converting a digital output from the color palette 56 to an analog signal and outputs it.
Next, the operation of the conventional bitmapped OSD unit shown in FIG. 14 will be described.
The CPU 51 operates in accordance with the programs stored in the main memory 54. First, the CPU 51 reads the font data stored in the font ROM 52, processes the font data, and transfers the font data to the frame memory 53. Alternatively, the CPU 51 generates font data in accordance with the program stored in the main memory 54, and stores the font data in the frame memory 53. Since the frame memory 53 corresponds to the display screen, the CPU 51 must store the font data in addresses corresponding to their display positions on the screen when storing them in the frame memory 53. The display data set in the frame memory 53 are sequentially transferred to the FIFO memory 55 in the order to be displayed. The FIFO memory 55 shifts the data in response to the display clock signal, and transfers the data to the color palette 56 at a constant rate. The display data output from the color palette 56 is fed to the D/A converter 57 which converts the display to analog data.
It is impossible for the conventional character OSD unit as shown in FIGS. 11-13 to achieve the moving display of the characters and graphics. Although the bitmapped OSD unit as shown in FIG. 14 can achieve the moving display of the characters and graphics, it requires a large capacity frame memory. For example, it requires 25.6 kilobytes to display a text of 16 lines high by 40 characters wide, with each font data of one character consisting of 20 dots high by 16 dots wide with two colors. Thus, the frame memory occupies much of the hardware when implementing the bitmapped OSD unit in an on-chip system.
In short, it is necessary for the conventional on-screen display unit and image display method to have a large capacity frame memory to achieve the moving display of the characters and graphics because of its configuration.